W25Q16CV
5. BLOCK DIAGRAM
SFDP Register
Security Register 1 - 3
000000h
0000FFh
003000h
002000h
001000h
0030FFh
0020FFh
0010FFh
Block Segmentation
xxFF00h
?
xxF000h
Sector 15 (4KB)
xxFFFFh
?
xxF0FFh
1FFF00h
?
1F0000h
Block 31 (64KB)
1FFFFFh
?
1F00FFh
xxEF00h
xxEFFFh
?
xxE000h
xxDF00h
?
xxD000h
xx2F00h
?
Sector 14 (4KB)
Sector 13 (4KB)
?
?
?
Sector 2 (4KB)
?
xxE0FFh
xxDFFFh
?
xxD0FFh
xx2FFFh
?
?
?
?
xx2000h
xx1F00h
?
xx1000h
xx0F00h
?
xx0000h
Sector 1 (4KB)
Sector 0 (4KB)
xx20FFh
xx1FFFh
?
xx10FFh
xx0FFFh
?
xx00FFh
10FF00h
?
100000h
0FFF00h
?
0F0000h
Block 16 (64KB)
Block 15 (64KB)
10FFFFh
?
1000FFh
0FFFFFh
?
0F00FFh
?
/WP (IO 2 )
Write Control
Logic
08FF00h
?
?
08FFFFh
?
080000h
Block 8 (64KB)
?
0800FFh
Status
07FF00h
07FFFFh
Register
?
070000h
Block 7 (64KB)
?
0700FFh
?
High Voltage
Generators
00FF00h
?
?
00FFFFh
/HOLD (IO 3 )
?
000000h
Block 0 (64KB)
?
0000FFh
CLK
/CS
SPI
Command &
Page Address
Latch / Counter
Beginning
Page Address
Ending
Page Address
Control Logic
Column Decode
And 256-Byte Page Buffer
Data
DI (IO 0 )
DO (IO 1 )
Byte Address
Latch / Counter
Figure 2. W25Q16CV Serial Flash Memory Block Diagram
Publication Release Date: October 03, 2013
- 11 -
Revision G
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